From d3d20ba70003e869af4d9f44d70d1d403d131812 Mon Sep 17 00:00:00 2001
From: sewardj <unknown>
Date: Thu, 13 Jan 2000 14:11:51 +0000
Subject: [PATCH] [project @ 2000-01-13 14:11:51 by sewardj] Rearrange
 top-level nativeGen plumbing so that -ddump-stix is visible even if
 subsequent nativeGen passes crash.

---
 ghc/compiler/main/CodeOutput.lhs      |  2 +-
 ghc/compiler/nativeGen/AsmCodeGen.lhs | 39 +++++++++++++--------------
 2 files changed, 19 insertions(+), 22 deletions(-)

diff --git a/ghc/compiler/main/CodeOutput.lhs b/ghc/compiler/main/CodeOutput.lhs
index cf2f0dfb5c45..e7fb411a4896 100644
--- a/ghc/compiler/main/CodeOutput.lhs
+++ b/ghc/compiler/main/CodeOutput.lhs
@@ -75,7 +75,7 @@ codeOutput mod_name c_code h_code flat_abstractC ncg_uniqs
     ncg_output_d = error "*** GHC not built with a native-code generator ***"
     ncg_output_w = ncg_output_d
 #else
-    (stix_raw, stix_opt, stix_final, ncg_output_d)
+    (stix_final, ncg_output_d)
        = nativeCodeGen flat_absC_ncg ncg_uniqs
     ncg_output_w = (\ f -> printForAsm f ncg_output_d)
 #endif
diff --git a/ghc/compiler/nativeGen/AsmCodeGen.lhs b/ghc/compiler/nativeGen/AsmCodeGen.lhs
index 7e92c9fe0c7a..4d1481c4c9ea 100644
--- a/ghc/compiler/nativeGen/AsmCodeGen.lhs
+++ b/ghc/compiler/nativeGen/AsmCodeGen.lhs
@@ -22,7 +22,8 @@ import PrimOp		( commutableOp, PrimOp(..) )
 import RegAllocInfo	( mkMRegsState, MRegsState )
 import Stix		( StixTree(..), StixReg(..), pprStixTrees )
 import PrimRep		( isFloatingRep )
-import UniqSupply	( returnUs, thenUs, mapUs, initUs_, UniqSM, UniqSupply )
+import UniqSupply	( returnUs, thenUs, mapUs, initUs, 
+                          initUs_, UniqSM, UniqSupply )
 import UniqFM		( UniqFM, emptyUFM, addToUFM, lookupUFM )
 import Outputable	
 
@@ -76,40 +77,36 @@ The machine-dependent bits break down as follows:
 \end{description}
 
 So, here we go:
+
 \begin{code}
-nativeCodeGen :: AbstractC -> UniqSupply -> (SDoc, SDoc, SDoc, SDoc)
-nativeCodeGen absC us = initUs_ us (runNCG absC)
+nativeCodeGen :: AbstractC -> UniqSupply -> (SDoc, SDoc)
+nativeCodeGen absC us
+   = let (stixRaw, us1) = initUs us (genCodeAbstractC absC)
+         stixOpt        = map (map genericOpt) stixRaw
+         stixFinal      = map x86floatFix stixOpt
+         insns          = initUs_ us1 (codeGen stixFinal)
+         debug_stix     = vcat (map pprStixTrees stixFinal)
+     in 
+         (debug_stix, insns)
 
-runNCG :: AbstractC -> UniqSM (SDoc, SDoc, SDoc, SDoc)
-runNCG absC
-  = genCodeAbstractC absC	`thenUs` \ stixRaw ->
-    let
-	stixOpt   = map (map genericOpt) stixRaw
 #if i386_TARGET_ARCH
-        stixFinal = map floatFix stixOpt
+x86floatFix = floatFix
 #else
-        stixFinal = stixOpt
+x86floatFix = id
 #endif
-    in
-        codeGen (stixRaw, stixOpt, stixFinal)
+
 \end{code}
 
 @codeGen@ is the top-level code-generation function:
 \begin{code}
-codeGen :: ([[StixTree]],[[StixTree]],[[StixTree]]) 
-           -> UniqSM (SDoc, SDoc, SDoc, SDoc)
+codeGen :: [[StixTree]] -> UniqSM SDoc
 
-codeGen (stixRaw, stixOpt, stixFinal)
+codeGen stixFinal
   = mapUs genMachCode stixFinal	`thenUs` \ dynamic_codes ->
     let
 	static_instrs = scheduleMachCode dynamic_codes
     in
-    returnUs (
-       text "ppr'd stixRaw",
-       text "ppr'd stixOpt",
-       vcat (map pprStixTrees stixFinal),
-       vcat (map pprInstr static_instrs)
-    )
+    returnUs (vcat (map pprInstr static_instrs))
 \end{code}
 
 Top level code generator for a chunk of stix code:
-- 
GitLab