• gmainlan@microsoft.com's avatar
    Add support for passing SSE vectors in registers. · 33bfc6a7
    gmainlan@microsoft.com authored
    This patch adds support for 6 XMM registers on x86-64 which overlap with the F
    and D registers and may hold 128-bit wide SIMD vectors. Because there is not a
    good way to attach type information to STG registers, we aggressively bitcast in
    the LLVM back-end.
    33bfc6a7
Regs.hs 4.71 KB