We must emit DELTA pseudo-instructions when moving %esp (#5747)

23a0ded3 · Simon Marlow · dc179f54 · 23a0ded3
Commit 23a0ded3 authored Jan 05, 2012 by Simon Marlow
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compiler/nativeGen/X86/CodeGen.hs compiler/nativeGen/X86/CodeGen.hs +3 -1

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--- a/compiler/nativeGen/X86/CodeGen.hs
+++ b/compiler/nativeGen/X86/CodeGen.hs
@@ -1744,9 +1744,11 @@ genCCall32 target dest_regs args =
                                                       (ImmInt 0)
                             sz = floatSize w
                         in toOL [ SUB II32 (OpImm (ImmInt b)) (OpReg esp),
+                                   DELTA (delta0 - b),
                                   GST sz fake0 tmp_amode,
                                   MOV sz (OpAddr tmp_amode) (OpReg r_dest),
-                                   ADD II32 (OpImm (ImmInt b)) (OpReg esp)]
+                                   ADD II32 (OpImm (ImmInt b)) (OpReg esp),
+                                   DELTA delta0]
                    else unitOL (GMOV fake0 r_dest)
              | isWord64 ty    = toOL [MOV II32 (OpReg eax) (OpReg r_dest),
                                        MOV II32 (OpReg edx) (OpReg r_dest_hi)]