Merge branch 'master' of http://darcs.haskell.org/ghc

compiler/main/DynFlags.hs

@@ -229,7 +229,7 @@ data DynFlag
    | Opt_DoStgLinting
    | Opt_DoCmmLinting
    | Opt_DoAsmLinting
-   | Opt_NoLlvmMangler
+   | Opt_NoLlvmMangler                 -- hidden flag
 
    | Opt_WarnIsError                    -- -Werror; makes warnings fatal
 
@@ -256,8 +256,8 @@ data DynFlag
    | Opt_RegsGraph                      -- do graph coloring register allocation
    | Opt_RegsIterative                  -- do iterative coalescing graph coloring register allocation
    | Opt_PedanticBottoms                -- Be picky about how we treat bottom
-   | Opt_LlvmTBAA                       -- Use LLVM TBAA infastructure for improving AA
-   | Opt_RegLiveness                    -- Use the STG Reg liveness information
+   | Opt_LlvmTBAA                       -- Use LLVM TBAA infastructure for improving AA (hidden flag)
+   | Opt_RegLiveness                    -- Use the STG Reg liveness information (hidden flag)
 
    -- Interface files
    | Opt_IgnoreInterfacePragmas
@@ -1641,7 +1641,7 @@ dynamic_flags = [
   , Flag "dshow-passes"            (NoArg (do forceRecompile
                                               setVerbosity $ Just 2))
   , Flag "dfaststring-stats"       (NoArg (setDynFlag Opt_D_faststring_stats))
-  , Flag "dno-llvm-mangler"        (NoArg (setDynFlag Opt_NoLlvmMangler))
+  , Flag "dno-llvm-mangler"        (NoArg (setDynFlag Opt_NoLlvmMangler)) -- hidden flag
 
         ------ Machine dependant (-m<blah>) stuff ---------------------------
 
@@ -1870,8 +1870,8 @@ fFlags = [
   ( "avoid-vect",                       Opt_AvoidVect, nop ),
   ( "regs-graph",                       Opt_RegsGraph, nop ),
   ( "regs-iterative",                   Opt_RegsIterative, nop ),
-  ( "llvm-tbaa",                        Opt_LlvmTBAA, nop),
-  ( "regs-liveness",                    Opt_RegLiveness, nop),
+  ( "llvm-tbaa",                        Opt_LlvmTBAA, nop), -- hidden flag
+  ( "regs-liveness",                    Opt_RegLiveness, nop), -- hidden flag
   ( "gen-manifest",                     Opt_GenManifest, nop ),
   ( "embed-manifest",                   Opt_EmbedManifest, nop ),
   ( "ext-core",                         Opt_EmitExternalCore, nop ),

docs/users_guide/using.xml

@@ -2147,51 +2147,6 @@ f "2"    = 2
           </listitem>
         </varlistentry>
 
-        <varlistentry>
-          <term>
-            <option>-fregs-liveness</option>
-            <indexterm><primary><option>-fregs-liveness</option></primary></indexterm>
-            <indexterm><primary>registers</primary></indexterm>
-            <indexterm><primary>stg registers</primary></indexterm>
-            <indexterm><primary>llvm optimisations</primary></indexterm>
-          </term>
-          <listitem>
-            <para><emphasis>This flag only works with the LLVM
-            (<option>-fllvm</option>) backend.</emphasis></para>
-
-            <para>GHC stores some state information that the runtime /
-            execution model needs frequent access to in the underlying
-            hardware registers. GHC historically has simply reserved these
-            registers for exclusive use for this purpose, stopping them being
-            using by intermediate code in a function. This optimisation
-            instead tracks when GHC actually needs to store this state and in
-            cases where it doesn't need it, frees up those hardware registers
-            for use.</para>
-
-            <para>Since GHC 7.6.1</para>
-          </listitem>
-        </varlistentry>
-
-        <varlistentry>
-          <term>
-            <option>-fllvm-tbaa</option>
-            <indexterm><primary><option>-fllvm-tbaa</option></primary></indexterm>
-            <indexterm><primary>alias analysis</primary></indexterm>
-            <indexterm><primary>llvm optimisations</primary></indexterm>
-          </term>
-          <listitem>
-            <para><emphasis>This flag only works with the LLVM
-            (<option>-fllvm</option>) backend.</emphasis></para>
-
-            <para>This optimisation enhances the alias analysis pass done by
-            the LLVM code generator which should result in more efficient
-            code as many other optimisations rely on accurate alias
-            information.</para>
-
-            <para>Since GHC 7.6.1</para>
-          </listitem>
-        </varlistentry>
-
         <varlistentry>
           <term>
             <option>-fexcess-precision</option>