Commit 949081a9 authored by pcapriotti's avatar pcapriotti
Browse files

Merge PrelRules refactoring (#7014)

parents c8335469 4f811e1a
......@@ -73,6 +73,8 @@ import DynFlags
import Outputable
import FastString
import ListSetOps
import Data.Maybe ( maybeToList )
......@@ -749,7 +751,7 @@ mkPrimOpId prim_op
id = mkGlobalId (PrimOpId prim_op) name ty info
info = noCafIdInfo
`setSpecInfo` mkSpecInfo (primOpRules prim_op name)
`setSpecInfo` mkSpecInfo (maybeToList $ primOpRules name prim_op)
`setArityInfo` arity
`setStrictnessInfo` Just strict_sig
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