- 21 Feb, 2009 1 commit
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Ian Lynagh authored
In particular, when building dph with the stage2 compiler, we want to register it in the main package.conf.
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- 19 Feb, 2009 4 commits
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Simon Marlow authored
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Simon Marlow authored
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Simon Marlow authored
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Simon Marlow authored
The API is the same (for now). The new implementation has the capability to define signal handlers that have access to the siginfo of the signal (#592), but this functionality is not exposed in this patch. #2451 is the ticket for the new API. The main purpose of bringing this in now is to fix race conditions in the old signal handling code (#2858). Later we can enable the new API in the HEAD. Implementation differences: - More of the signal-handling is moved into Haskell. We store the table of signal handlers in an MVar, rather than having a table of StablePtrs in the RTS. - In the threaded RTS, the siginfo of the signal is passed down the pipe to the IO manager thread, which manages the business of starting up new signal handler threads. In the non-threaded RTS, the siginfo of caught signals is stored in the RTS, and the scheduler starts new signal handler threads.
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- 18 Feb, 2009 3 commits
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Ian Lynagh authored
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Ian Lynagh authored
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Ian Lynagh authored
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- 17 Feb, 2009 3 commits
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Ian Lynagh authored
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Ben.Lippmeier@anu.edu.au authored
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Ben.Lippmeier@anu.edu.au authored
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- 16 Feb, 2009 3 commits
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Ben.Lippmeier@anu.edu.au authored
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Ben.Lippmeier@anu.edu.au authored
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Ben.Lippmeier@anu.edu.au authored
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- 15 Feb, 2009 8 commits
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Ben.Lippmeier@anu.edu.au authored
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Ben.Lippmeier@anu.edu.au authored
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Ben.Lippmeier@anu.edu.au authored
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Ben.Lippmeier@anu.edu.au authored
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Ben.Lippmeier@anu.edu.au authored
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Ben.Lippmeier@anu.edu.au authored
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Ben.Lippmeier@anu.edu.au authored
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Ben.Lippmeier@anu.edu.au authored
- nativeGen/Instruction defines a type class for a generic instruction set. Each of the instruction sets we have, X86, PPC and SPARC are instances of it. - The register alloctors use this type class when they need info about a certain register or instruction, such as regUsage, mkSpillInstr, mkJumpInstr, patchRegs.. - nativeGen/Platform defines some data types enumerating the architectures and operating systems supported by the native code generator. - DynFlags now keeps track of the current build platform, and the PositionIndependentCode module uses this to decide what to do instead of relying of #ifdefs. - It's not totally retargetable yet. Some info info about the build target is still hardwired, but I've tried to contain most of it to a single module, TargetRegs. - Moved the SPILL and RELOAD instructions into LiveInstr. - Reg and RegClass now have their own modules, and are shared across all architectures.
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- 11 Feb, 2009 2 commits
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Ben.Lippmeier@anu.edu.au authored
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Ben.Lippmeier@anu.edu.au authored
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- 05 Feb, 2009 1 commit
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Ben.Lippmeier@anu.edu.au authored
- There are still some #ifdefs for choosing between i386, x86_64, linux, darwin and other OS's. - Also reformat SPARC.RegInfo to remove some of the visual noise.
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- 13 Feb, 2009 1 commit
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Ian Lynagh authored
This should fix the build with GHC 6.6
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- 12 Feb, 2009 1 commit
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Simon Marlow authored
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- 11 Feb, 2009 1 commit
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Simon Marlow authored
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- 13 Feb, 2009 4 commits
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Ben.Lippmeier@anu.edu.au authored
Darwin 9.6.0 + GCC 4.0.1 doesn't understand "msync". I think "sync" means the same thing.
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Ben.Lippmeier@anu.edu.au authored
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Ben.Lippmeier@anu.edu.au authored
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Ben.Lippmeier@anu.edu.au authored
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- 12 Feb, 2009 2 commits
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Ian Lynagh authored
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Ian Lynagh authored
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- 11 Feb, 2009 6 commits
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Ian Lynagh authored
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simonpj@microsoft.com authored
The function FunDeps.grow was not doing the right thing when type equality constraints were involved. That wasn't really its fault: its input was being filtered by fdPredsOfInsts. To fix this I did a bit of refactoring, so that the (revolting) fdPredsOfInsts is now less important (maybe we can get rid of it in due course). The 'grow' function moves from FunDeps to Inst.growInstsTyVars TcMTType.growThetaTyVars TcMType.growTyVars The main comments are with the first of these, in Note [Growing the tau-tvs using constraints] in Inst. Push to the branch if conflict free.
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Simon Marlow authored
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Simon Marlow authored
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Ian Lynagh authored
We were zeroing the wrong memory
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Ian Lynagh authored
It was getting confused by lines like: # 9 "C:\Temp\/ghc620_0/ghc620_0.hc" 1
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