ghc-prim: hs_atomicread* and hs_atomicwrite* missing barriers
The comments in compiler/prelude/primops.txt.pp for both operations say "... Implies a full memory barrier."
The implementation does not issue any barriers as exemplified by the 32-bit variants as can be seen in the excerpts from libraries/ghc-prim/cbits/atomic.c.
StgWord
hs_atomicread32(StgWord x)
{
return *(volatile StgWord32 *) x;
}and
void
hs_atomicwrite32(StgWord x, StgWord val)
{
*(volatile StgWord32 *) x = (StgWord32) val;
}The native code generator for X86/amd64 and the LLVM backend do not generate calls to these functions but generate the necessary barrier (mfence) directly and thus are not affected by this issue.
There are no gcc __sync_* intrinsics for the two operations. The new __atomic_* intrinisics have the required operations but require gcc 4.7 or later.
Trac metadata
| Trac field | Value |
|---|---|
| Version | 8.2.1 |
| Type | Bug |
| TypeOfFailure | OtherFailure |
| Priority | normal |
| Resolution | Unresolved |
| Component | Prelude |
| Test case | |
| Differential revisions | |
| BlockedBy | |
| Related | |
| Blocking | |
| CC | simonmar |
| Operating system | |
| Architecture |