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MO_AcquireFence: Less restrictive barrier

Sven Tennie requested to merge wip/supersven/aarch64-memory-barriers into master

GCC and CLang translate the built-in atomic_thread_fence(memory_order_acquire) to dmb ishld, which is a bit less restrictive than dmb ish (which also implies stores.)

As GHC's current memory mode is inspired by the C11 memory model, it should be valid to transfer this insight from C to GHC/Cmm.

Here's a Godbolt project to check this: https://godbolt.org/z/doGzrMTjf

Edited by Sven Tennie

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