Fix AArch64 clobbering bug for MUL2

Ticket: #27046 (closed)

This MR fixes an issue in which, on AArch64, the code generator could clobber one of the input operands when computing the lower bits of a MUL2 operation. This rendered invalid the subsequent computation of the high bits.

The fix is to introduce a temporary register. The register allocator can remove the redundant move in the common case when the registers do not conflict.

As we can see in this job log, the added test indeed fails before the fix.