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WIP: rts: Ensure proper write ordering during indirection construction

Closed Ben Gamari requested to merge wip/T15449 into master

Previously (on architectures with weak memory models) there was a possibility that writes to an indirection's indirectee field would become visible before the writes that initialize the indirectee closure itself would become visible. We fix this by placing a write barrier between the closure construction and the write to indirectee:

#define updateWithIndirection(p1, p2, and_then) \
    prim_write_barrier;                                         \
    StgInd_indirectee(p1) = p2;                                 \
    #               <--- previously the write_barrier was here  \
    SET_INFO(p1, stg_BLACKHOLE_info);                           \

While this just moves an existing write barrier, there is a rather subtle implication: it is principle possible for the writes to p1->info to become visible before those to p1->indirectee. However, this is okay since we know that this field was earlier set to the owning TSO or blocking queue. When the stg_BLACKHOLE entry code sees a blackhole whose indirectee is a TSO or blocking queue it will retry or block as appropriate.

Fixes #15449 (closed).

Todo

  • validate on ARMv8
Edited by Ben Gamari