• gmainlan@microsoft.com's avatar
    Generate correct LLVM for the new register allocation scheme. · dcf88e66
    gmainlan@microsoft.com authored
    We now have accurate global register liveness information attached to all Cmm
    procedures and jumps. With this patch, the LLVM back end uses this information
    to pass only the live floating point (F and D) registers on tail calls. This
    makes the LLVM back end compatible with the new register allocation strategy.
    Ideally the GHC LLVM calling convention would put all registers that are always
    live first in the parameter sequence. Unfortunately the specification is written
    so that on x86-64 SpLim (always live) is passed after the R registers. Therefore
    we must always pass *something* in the R registers, so we pass the LLVM value
LlvmCodeGen.hs 6.13 KB