Commit 4bd58c17 authored by Erik de Castro Lopo's avatar Erik de Castro Lopo
Browse files

PPC: Fix right shift by 32 bits #10870

Summary: Test included.

Test Plan: Run test T10870.hs on X86/X86_64/Arm/Arm64 etc

Reviewers: bgamari, nomeata, austin

Subscribers: thomie

Differential Revision: https://phabricator.haskell.org/D1322

GHC Trac Issues: #10870
parent f0023409
......@@ -710,6 +710,21 @@ pprInstr (EXTS fmt reg1 reg2) = hcat [
pprInstr (NEG reg1 reg2) = pprUnary (sLit "neg") reg1 reg2
pprInstr (NOT reg1 reg2) = pprUnary (sLit "not") reg1 reg2
pprInstr (SR II32 reg1 reg2 (RIImm (ImmInt i))) | i < 0 || i > 31 =
-- Handle the case where we are asked to shift a 32 bit register by
-- less than zero or more than 31 bits. We convert this into a clear
-- of the destination register.
-- Fixes ticket http://ghc.haskell.org/trac/ghc/ticket/5900
pprInstr (XOR reg1 reg2 (RIReg reg2))
pprInstr (SL II32 reg1 reg2 (RIImm (ImmInt i))) | i < 0 || i > 31 =
-- As aboce for SR, but for left shifts.
-- Fixes ticket http://ghc.haskell.org/trac/ghc/ticket/10870
pprInstr (XOR reg1 reg2 (RIReg reg2))
pprInstr (SRA II32 reg1 reg2 (RIImm (ImmInt i))) | i < 0 || i > 31 =
pprInstr (XOR reg1 reg2 (RIReg reg2))
pprInstr (SL fmt reg1 reg2 ri) =
let op = case fmt of
II32 -> "slw"
......@@ -717,12 +732,6 @@ pprInstr (SL fmt reg1 reg2 ri) =
_ -> panic "PPC.Ppr.pprInstr: shift illegal size"
in pprLogic (sLit op) reg1 reg2 (limitShiftRI fmt ri)
pprInstr (SR II32 reg1 reg2 (RIImm (ImmInt i))) | i > 31 || i < 0 =
-- Handle the case where we are asked to shift a 32 bit register by
-- less than zero or more than 31 bits. We convert this into a clear
-- of the destination register.
-- Fixes ticket http://ghc.haskell.org/trac/ghc/ticket/5900
pprInstr (XOR reg1 reg2 (RIReg reg2))
pprInstr (SR fmt reg1 reg2 ri) =
let op = case fmt of
II32 -> "srw"
......
import Data.Bits
import Data.Int
import Data.Word
unsafeShift32R :: (Bits a, Num a) => a -> a
unsafeShift32R x = unsafeShiftR x 32
main :: IO ()
main = do
print $ map unsafeShift32R [ 123456, 0x7fffffff :: Int ]
print $ map unsafeShift32R [ 123456, 0xffffffff :: Word ]
......@@ -138,3 +138,4 @@ test('T10414', [only_ways(['threaded2']), extra_ways(['threaded2'])],
compile_and_run, ['-feager-blackholing'])
test('T10521', normal, compile_and_run, [''])
test('T10521b', normal, compile_and_run, [''])
test('T10870', normal, compile_and_run, [''])
Markdown is supported
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment