SPARC NCG: Don't need a write barrier for store synchronisation on SPARC under TSO.

parent c0ea29af
......@@ -3616,6 +3616,16 @@ genCCall
-}
-- On SPARC under TSO (Total Store Ordering), writes earlier in the instruction stream
-- are guaranteed to take place before writes afterwards (unlike on PowerPC).
-- Ref: Section 8.4 of the SPARC V9 Architecture manual.
--
-- In the SPARC case we don't need a barrier.
--
genCCall (CmmPrim (MO_WriteBarrier)) _ _
= do return nilOL
genCCall target dest_regs argsAndHints
= do
-- strip hints from the arg regs
......
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