1. 28 Feb, 2006 2 commits
    • simonpj@microsoft.com's avatar
      Simplify the IdInfo before any RHSs · 2317c27b
      simonpj@microsoft.com authored
      	~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
      Simplfy (i.e. substitute) the IdInfo of a recursive group of Ids
      before looking at the RHSs of *any* of them.  That way, the rules
      are available throughout the letrec, which means we don't have to
      be careful about function to put first.
      
      Before, we just simplified the IdInfo of f before looking at f's RHS,
      but that's not so good when f and g both have RULES, and both rules
      mention the other.
      
      This change makes things simpler, but shouldn't change performance.
      2317c27b
    • simonpj@microsoft.com's avatar
      badd5d76
  2. 27 Feb, 2006 2 commits
  3. 22 Feb, 2006 2 commits
  4. 27 Feb, 2006 2 commits
  5. 25 Feb, 2006 1 commit
  6. 26 Feb, 2006 1 commit
  7. 25 Feb, 2006 3 commits
    • wolfgang.thaller@gmx.net's avatar
      9772b3f8
    • wolfgang.thaller@gmx.net's avatar
      NCG: Fix Typo in Register Allocator Loop Patch · 17fc6271
      wolfgang.thaller@gmx.net authored
      Fix previous patch "NCG: Handle loops in register allocator"
      Of course, I broke it when correcting a style problem just before committing.
      17fc6271
    • wolfgang.thaller@gmx.net's avatar
      NCG: Handle loops in register allocator · 34f992d3
      wolfgang.thaller@gmx.net authored
      Fill in the missing parts in the register allocator so that it can
      handle loops.
      
      *) The register allocator now runs in the UniqSuppy monad, as it needs
         to be able to generate unique labels for fixup code blocks.
      
      *) A few functions have been added to RegAllocInfo:
      	mkRegRegMoveInstr -- generates a good old move instruction
      	mkBranchInstr     -- used to be MachCodeGen.genBranch
      	patchJump         -- Change the destination of a jump
      
      *) The register allocator now makes sure that only one spill slot is used
         for each temporary, even if it is spilled and reloaded several times.
         This obviates the need for memory-to-memory moves in fixup code.
      
      LIMITATIONS:
      
      *) The case where the fixup code needs to cyclically permute a group of
         registers is currently unhandled. This will need more work once we come
         accross code where this actually happens.
      
      *) Register allocation for code with loop is probably very inefficient
         (both at compile-time and at run-time).
      
      *) We still cannot compile the RTS via NCG, for various other reasons.
      34f992d3
  8. 24 Feb, 2006 12 commits
  9. 23 Feb, 2006 11 commits
  10. 10 Feb, 2006 1 commit
  11. 22 Feb, 2006 3 commits