- 07 Jul, 2009 1 commit
-
-
Ian Lynagh authored
-
- 19 May, 2009 1 commit
-
-
Ben.Lippmeier@anu.edu.au authored
-
- 18 May, 2009 1 commit
-
-
Ben.Lippmeier@anu.edu.au authored
* The old Reg type is now split into VirtualReg and RealReg. * For the graph coloring allocator, the type of the register graph is now (Graph VirtualReg RegClass RealReg), which shows that it colors in nodes representing virtual regs with colors representing real regs. (as was intended) * RealReg contains two contructors, RealRegSingle and RealRegPair, where RealRegPair is used to represent a SPARC double reg constructed from two single precision FP regs. * On SPARC we can now allocate double regs into an arbitrary register pair, instead of reserving some reg ranges to only hold float/double values.
-
- 15 Feb, 2009 1 commit
-
-
Ben.Lippmeier@anu.edu.au authored
- nativeGen/Instruction defines a type class for a generic instruction set. Each of the instruction sets we have, X86, PPC and SPARC are instances of it. - The register alloctors use this type class when they need info about a certain register or instruction, such as regUsage, mkSpillInstr, mkJumpInstr, patchRegs.. - nativeGen/Platform defines some data types enumerating the architectures and operating systems supported by the native code generator. - DynFlags now keeps track of the current build platform, and the PositionIndependentCode module uses this to decide what to do instead of relying of #ifdefs. - It's not totally retargetable yet. Some info info about the build target is still hardwired, but I've tried to contain most of it to a single module, TargetRegs. - Moved the SPILL and RELOAD instructions into LiveInstr. - Reg and RegClass now have their own modules, and are shared across all architectures.
-
- 04 Feb, 2009 1 commit
-
-
Ben.Lippmeier@anu.edu.au authored
-
- 02 Feb, 2009 1 commit
-
-
Ben.Lippmeier@anu.edu.au authored
-