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Commit 3cbb4112 authored by sof's avatar sof
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[project @ 1997-06-05 09:16:04 by sof]

Do not use loop breaker modules with 2.0x
parent b505fcd5
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......@@ -24,7 +24,6 @@ module TyVar (
) where
CHK_Ubiq() -- debugging consistency check
--IMPORT_DELOOPER(IdLoop) -- for paranoia checking
-- friends
import Usage ( GenUsage, SYN_IE(Usage), usageOmega )
......
......@@ -42,12 +42,18 @@ module Type (
) where
IMP_Ubiq()
#if defined(__GLASGOW_HASKELL__) && __GLASGOW_HASKELL__ <= 201
IMPORT_DELOOPER(IdLoop) -- for paranoia checking
IMPORT_DELOOPER(TyLoop)
--IMPORT_DELOOPER(PrelLoop) -- for paranoia checking
#else
import {-# SOURCE #-} Id ( Id, dataConArgTys )
import {-# SOURCE #-} TysPrim ( voidTy )
import {-# SOURCE #-} TysWiredIn ( tupleTyCon )
#endif
-- friends:
import Class ( classSig, classOpLocalType, GenClass{-instances-} )
import Class ( classSig, classOpLocalType, GenClass{-instances-}, SYN_IE(Class) )
import Kind ( mkBoxedTypeKind, resultKind, notArrowKind, Kind )
import TyCon ( mkFunTyCon, isFunTyCon, isEnumerationTyCon, isTupleTyCon, maybeTyConSingleCon,
isPrimTyCon, isAlgTyCon, isDataTyCon, isSynTyCon, maybeNewTyCon, isNewTyCon,
......
......@@ -69,7 +69,12 @@ module FiniteMap (
#endif
) where
#if defined(__GLASGOW_HASKELL__) && __GLASGOW_HASKELL__ <= 201
IMPORT_DELOOPER(SpecLoop)
#else
import {-# SOURCE #-} Name
#endif
#if __GLASGOW_HASKELL__ >= 202
import GlaExts
#endif
......
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