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  • Kavon Farvardin's avatar
    Fix for T14251 on ARM · d8495549
    Kavon Farvardin authored and Ben Gamari's avatar Ben Gamari committed
    We now calculate the SSE register padding needed to fix the calling
    convention in LLVM in a robust way: grouping them by whether
    registers in that class overlap (with the same class overlapping
    itself).
    
    My prior patch assumed that no matter the platform, physical
    register Fx aliases with Dx, etc, for our calling convention.
    
    This is unfortunately not the case for any platform except x86-64.
    
    Test Plan:
    Only know how to test on x86-64, but it should be tested on ARM with:
    
    `make test WAYS=llvm && make test WAYS=optllvm`
    
    Reviewers: bgamari, angerman
    
    Reviewed By: bgamari
    
    Subscribers: rwbarton, carter
    
    GHC Trac Issues: #15780, #14251, #15747
    
    Differential Revision: https://phabricator.haskell.org/D5254
    d8495549