nativeGen/AArch64: Improve codegen for MO_Xor immediates

This extends the codegen to allow MO_Xor operands to be encoded as
bitmask immediates.

compiler/GHC/CmmToAsm/AArch64/CodeGen.hs

@@ -783,6 +783,11 @@ getRegister' config plat expr
       where w' = formatToWidth (cmmTypeFormat (cmmRegType reg))
             r' = getRegisterReg plat reg
 
+    CmmMachOp (MO_Xor w) [(CmmReg reg), CmmLit (CmmInt n _)] | isAArch64Bitmask (fromIntegral n) ->
+      return $ Any (intFormat w) (\d -> unitOL $ annExpr expr (EOR (OpReg w d) (OpReg w' r') (OpImm (ImmInteger n))))
+      where w' = formatToWidth (cmmTypeFormat (cmmRegType reg))
+            r' = getRegisterReg plat reg
+
     -- Generic case.
     CmmMachOp op [x, y] -> do
       -- alright, so we have an operation, and two expressions. And we want to essentially do