Investigate if we can use register IP0 in more places
This is mostly a reminder to myself.
On aarch64 there is register x16 which is blocked (i.e. not part of the free register set) for register spill calculations. It's called inter-procedural register, IP0
.
As this was made up due to the NCG framework not being able to assign virtual registers for register spilling, we should be free to do with this register anything we like as long as we not depend on it being not clobbered.
The idea is to use IP0
in calculations where we currently use temporary (!) virtual registers that are not (!) used to carry results outside of the very limited scope of translating a MachOp. If that works out, we would get a bit of the price of statically assigning IP0
back. Because, under the described circumstances, we would be saving one register allocation by using IP0
as temporary register, preventing some spills.
I'm not 100% sure if this will work out. I'll try it.