AArch64 ncg: isAArch64Bitmask does not account for operation width dependence

Which bitmask immediates are valid depends on the width of the operation for some reason.

Simple way to verify this:

.global foo

// valid
AND x0, x0, 0xFFFFFFFF

// invalid
AND w0, w0, 0xFFFFFFFF

gcc t.s -c
t.s: Assembler messages:
t.s:8: Error: immediate out of range at operand 3 -- `and w0,w0,0xFFFFFFFF'

It's probably enough to check for the all-ones case on 32bit. But I will verify this by going through the spec before adjusting the code.