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Fix genapply to handle vector registers

sheaf requested to merge sheaf/ghc:T25062 into master

This commit updates genapply to use xmm, ymm and zmm registers, for stg_ap_v16/stg_ap_v32/stg_ap_v64, respectively.

All mentions of xmm, ymm and zmm registers are wrapped in CPP conditionals such as #if defined(REG_YMM1) to ensure we don't produce Cmm code that we can't actually compile. This is not entirely satisfactory, as we should be able to decide at runtime how this code should be compiled (e.g. using the LLVM backend on AArch64 which presumably has some way of handling ymm/zmm).

The commit also updates the Cmm lexer and parser to produce Cmm vectors rather than 128/256/512 bit wide scalars for V16/V32/V64, removing bits128, bits256 and bits512 in favour of vectors.

The Cmm Lint check is weakened for vectors, as (in practice, e.g. on X86) it is okay to use a single vector register to hold multiple different types of data, and we don't know just from seeing e.g. "XMM1" how to interpret the 128 bits of data within.

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