rts: Increase gen_workspace alignment to 128 bytes

Increase to match the 128-byte cache-line size of Apple's ARMv8 implementation.

Closes #25459 (closed).

mentioned in issue #25459 (closed)

There are a couple of other places with 64-byte alignment which I assume are all for preventing false sharing? In that case you might want to have a literal in a header and use that to substitute the ATTRIBUTE_ALIGNED(64)s?

Yes, good catch. I will execute.

As @TerrorJack said I think it would be better if we had _GHC_ATTRIBUTE_CACHLINE_ALIGNED or similar.

This would also allow us to be more precise for platforms with smaller cache lines in the future if it turns out to be significant in some cases.

Seems we already have CAPABILITY_ALIGNMENT for such purpose. Seems best to (re)use this here as well.

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• 6e07238e - rts: Increase gen_workspace alignment to 128 bytes on AArch64

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• 3da67f40 - rts: Increase gen_workspace alignment to 128 bytes on AArch64

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assigned to @marge-bot

I will attempt to batch this MR (!13601 (closed))...

Merged in a0fa4941

closed