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# Using SIMD instructions in GHC
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**Goal**: improve program running times by taking advantage of CPU's SIMD vector instructions.
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**How**: by extending GHC to generate code using SIMD vector instructions and by modifying libraries as necessary.
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This page describes the issues involved and a design for implementing SIMD vector support in GHC.
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Related pages:
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- Notes on the [current implementation plan](simd-plan)
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This is the design document for SIMD support in GHC that resulted from the October 11, 2011 meeting at GHC HQ. Please see the [top-level GHC SIMD](simd) page for further details.
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## Introduction
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... | ... | @@ -909,5 +898,5 @@ If later on we add vector data-movement instructions to the NCG, then the arch-c |
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## See also
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- [ Blog article about Larrabee and Nvidia, MIMD vs. SIMD](http://perilsofparallel.blogspot.com/2008/09/larrabee-vs-nvidia-mimd-vs-simd.html)
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- [SIMD LLVM](simd-llvm) A previous (LLVM-specific) iteration of this SIMD proposal.
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- [VectorComputing](vector-computing) A previous proposal to make use of x86 SSE in GHC. |
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- [SIMD LLVM:](simd/implementation/llvm) A previous (LLVM-specific) iteration of this SIMD proposal.
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- [Vector Computing:](simd/implementation/old) A previous proposal to make use of x86 SSE in GHC. |