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- new codegen by default
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- **Improved floating point register allocation.** On x86-64 there are now six machine registers available for any mixture of floating-point types. Previously a maximum of four values of type Float and two values of type Double could simultaneously be kept in machine registers.
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- **SIMD primitives.** The simd branch now supports passing SSE vector values in machine registers. We expect the simd branch to be merged in time for 7.8.
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\[1\][ http://www.cse.unsw.edu.au/\~chak/papers/KCLLP12.html](http://www.cse.unsw.edu.au/~chak/papers/KCLLP12.html)
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\[2\][ http://www.cse.unsw.edu.au/\~chak/papers/LCKLP12.html](http://www.cse.unsw.edu.au/~chak/papers/LCKLP12.html) |
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