Skip to content
GitLab
Explore
Sign in
Register
Primary navigation
Search or go to…
Project
GHC
Manage
Activity
Members
Labels
Plan
Issues
Issue boards
Milestones
Wiki
Requirements
Code
Merge requests
Repository
Branches
Commits
Tags
Repository graph
Compare revisions
Snippets
Locked files
Build
Pipelines
Jobs
Pipeline schedules
Test cases
Artifacts
Deploy
Releases
Package Registry
Model registry
Operate
Terraform modules
Analyze
Value stream analytics
Contributor analytics
CI/CD analytics
Repository analytics
Code review analytics
Issue analytics
Insights
Model experiments
Help
Help
Support
GitLab documentation
Compare GitLab plans
Community forum
Contribute to GitLab
Provide feedback
Terms and privacy
Keyboard shortcuts
?
Snippets
Groups
Projects
Show more breadcrumbs
Gesh
GHC
Commits
9eca3c26
Commit
9eca3c26
authored
26 years ago
by
sof
Browse files
Options
Downloads
Patches
Plain Diff
[project @ 1999-01-18 14:31:50 by sof]
long long support: cleared up Real vs. virtual regs. confusion (I hope!)
parent
301b3418
Loading
Loading
No related merge requests found
Changes
3
Hide whitespace changes
Inline
Side-by-side
Showing
3 changed files
ghc/compiler/codeGen/CgRetConv.lhs
+6
-7
6 additions, 7 deletions
ghc/compiler/codeGen/CgRetConv.lhs
ghc/compiler/main/Constants.lhs
+3
-1
3 additions, 1 deletion
ghc/compiler/main/Constants.lhs
ghc/includes/MachRegs.h
+2
-1
2 additions, 1 deletion
ghc/includes/MachRegs.h
with
11 additions
and
9 deletions
ghc/compiler/codeGen/CgRetConv.lhs
+
6
−
7
View file @
9eca3c26
%
% (c) The GRASP Project, Glasgow University, 1992-1998
%
% $Id: CgRetConv.lhs,v 1.1
6
199
8/12
/18 1
7:40
:5
2
s
imonpj
Exp $
% $Id: CgRetConv.lhs,v 1.1
7
199
9/01
/18 1
4:31
:5
1
s
of
Exp $
%
\section[CgRetConv]{Return conventions for the code generator}
...
...
@@ -21,10 +21,9 @@ module CgRetConv (
import AbsCSyn -- quite a few things
import Constants ( mAX_FAMILY_SIZE_FOR_VEC_RETURNS,
mAX_Vanilla_REG, mAX_Float_REG,
mAX_Double_REG,
mAX_Double_REG,
mAX_Real_Double_REG,
mAX_Real_Vanilla_REG, mAX_Real_Float_REG,
mAX_Real_Double_REG,
mAX_Long_REG
mAX_Long_REG, mAX_Real_Long_REG
)
import Maybes ( catMaybes )
import DataCon ( dataConRawArgTys, DataCon )
...
...
@@ -182,17 +181,17 @@ We take these register supplies from the *real* registers, i.e. those
that are guaranteed to map to machine registers.
\begin{code}
vanillaRegNos, floatRegNos, doubleRegNos :: [Int]
vanillaRegNos, floatRegNos, doubleRegNos
, longRegNos
:: [Int]
vanillaRegNos = [1 .. mAX_Real_Vanilla_REG]
floatRegNos = [1 .. mAX_Real_Float_REG]
doubleRegNos = [1 .. mAX_Real_Double_REG]
longRegNos = [1 .. mAX_Long_REG]
longRegNos = [1 .. mAX_
Real_
Long_REG]
allVanillaRegNos, allFloatRegNos, allDoubleRegNos, allLongRegNos :: [Int]
allVanillaRegNos = [1 .. mAX_Vanilla_REG]
allFloatRegNos = [1 .. mAX_Float_REG]
allDoubleRegNos = [1 .. mAX_Double_REG]
allLongRegNos = [1 .. mAX_
Double
_REG]
allLongRegNos = [1 .. mAX_
Long
_REG]
type AvailRegs = ( [Int] -- available vanilla regs.
, [Int] -- floats
...
...
This diff is collapsed.
Click to expand it.
ghc/compiler/main/Constants.lhs
+
3
−
1
View file @
9eca3c26
...
...
@@ -56,6 +56,7 @@ module Constants (
mAX_Real_Vanilla_REG,
mAX_Real_Float_REG,
mAX_Real_Double_REG,
mAX_Real_Long_REG,
oTHER_TAG,
...
...
@@ -175,10 +176,12 @@ sEQ_FRAME_SIZE = (SEQ_FRAME_SIZE::Int)
mAX_Vanilla_REG = (MAX_VANILLA_REG :: Int)
mAX_Float_REG = (MAX_FLOAT_REG :: Int)
mAX_Double_REG = (MAX_DOUBLE_REG :: Int)
mAX_Long_REG = (MAX_LONG_REG :: Int)
mAX_Real_Vanilla_REG = (MAX_REAL_VANILLA_REG :: Int)
mAX_Real_Float_REG = (MAX_REAL_FLOAT_REG :: Int)
mAX_Real_Double_REG = (MAX_REAL_DOUBLE_REG :: Int)
mAX_Real_Long_REG = (MAX_REAL_LONG_REG :: Int)
\end{code}
Closure header sizes.
...
...
@@ -204,7 +207,6 @@ Size of a double in StgWords.
\begin{code}
dOUBLE_SIZE = (DOUBLE_SIZE :: Int)
mAX_Long_REG = (MAX_LONG_REG :: Int)
wORD64_SIZE = (WORD64_SIZE :: Int)
iNT64_SIZE = (INT64_SIZE :: Int)
\end{code}
...
...
This diff is collapsed.
Click to expand it.
ghc/includes/MachRegs.h
+
2
−
1
View file @
9eca3c26
/* -----------------------------------------------------------------------------
* $Id: MachRegs.h,v 1.
2
199
8/12/02 13:21:13 simonm
Exp $
* $Id: MachRegs.h,v 1.
3
199
9/01/18 14:31:50 sof
Exp $
*
* Registers used in STG code. Might or might not correspond to
* actual machine registers.
...
...
@@ -214,6 +214,7 @@
#define MAX_REAL_VANILLA_REG 1
/* always, since it defines the entry conv */
#define MAX_REAL_FLOAT_REG 0
#define MAX_REAL_DOUBLE_REG 0
#define MAX_REAL_LONG_REG 0
#endif
/* iX86 */
...
...
This diff is collapsed.
Click to expand it.
Preview
0%
Loading
Try again
or
attach a new file
.
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Save comment
Cancel
Please
register
or
sign in
to comment