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Commit 9eca3c26 authored by sof's avatar sof
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[project @ 1999-01-18 14:31:50 by sof]

long long support: cleared up Real vs. virtual regs. confusion (I hope!)
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% %
% (c) The GRASP Project, Glasgow University, 1992-1998 % (c) The GRASP Project, Glasgow University, 1992-1998
% %
% $Id: CgRetConv.lhs,v 1.16 1998/12/18 17:40:52 simonpj Exp $ % $Id: CgRetConv.lhs,v 1.17 1999/01/18 14:31:51 sof Exp $
% %
\section[CgRetConv]{Return conventions for the code generator} \section[CgRetConv]{Return conventions for the code generator}
...@@ -21,10 +21,9 @@ module CgRetConv ( ...@@ -21,10 +21,9 @@ module CgRetConv (
import AbsCSyn -- quite a few things import AbsCSyn -- quite a few things
import Constants ( mAX_FAMILY_SIZE_FOR_VEC_RETURNS, import Constants ( mAX_FAMILY_SIZE_FOR_VEC_RETURNS,
mAX_Vanilla_REG, mAX_Float_REG, mAX_Vanilla_REG, mAX_Float_REG,
mAX_Double_REG, mAX_Double_REG, mAX_Real_Double_REG,
mAX_Real_Vanilla_REG, mAX_Real_Float_REG, mAX_Real_Vanilla_REG, mAX_Real_Float_REG,
mAX_Real_Double_REG, mAX_Long_REG, mAX_Real_Long_REG
mAX_Long_REG
) )
import Maybes ( catMaybes ) import Maybes ( catMaybes )
import DataCon ( dataConRawArgTys, DataCon ) import DataCon ( dataConRawArgTys, DataCon )
...@@ -182,17 +181,17 @@ We take these register supplies from the *real* registers, i.e. those ...@@ -182,17 +181,17 @@ We take these register supplies from the *real* registers, i.e. those
that are guaranteed to map to machine registers. that are guaranteed to map to machine registers.
\begin{code} \begin{code}
vanillaRegNos, floatRegNos, doubleRegNos :: [Int] vanillaRegNos, floatRegNos, doubleRegNos, longRegNos :: [Int]
vanillaRegNos = [1 .. mAX_Real_Vanilla_REG] vanillaRegNos = [1 .. mAX_Real_Vanilla_REG]
floatRegNos = [1 .. mAX_Real_Float_REG] floatRegNos = [1 .. mAX_Real_Float_REG]
doubleRegNos = [1 .. mAX_Real_Double_REG] doubleRegNos = [1 .. mAX_Real_Double_REG]
longRegNos = [1 .. mAX_Long_REG] longRegNos = [1 .. mAX_Real_Long_REG]
allVanillaRegNos, allFloatRegNos, allDoubleRegNos, allLongRegNos :: [Int] allVanillaRegNos, allFloatRegNos, allDoubleRegNos, allLongRegNos :: [Int]
allVanillaRegNos = [1 .. mAX_Vanilla_REG] allVanillaRegNos = [1 .. mAX_Vanilla_REG]
allFloatRegNos = [1 .. mAX_Float_REG] allFloatRegNos = [1 .. mAX_Float_REG]
allDoubleRegNos = [1 .. mAX_Double_REG] allDoubleRegNos = [1 .. mAX_Double_REG]
allLongRegNos = [1 .. mAX_Double_REG] allLongRegNos = [1 .. mAX_Long_REG]
type AvailRegs = ( [Int] -- available vanilla regs. type AvailRegs = ( [Int] -- available vanilla regs.
, [Int] -- floats , [Int] -- floats
......
...@@ -56,6 +56,7 @@ module Constants ( ...@@ -56,6 +56,7 @@ module Constants (
mAX_Real_Vanilla_REG, mAX_Real_Vanilla_REG,
mAX_Real_Float_REG, mAX_Real_Float_REG,
mAX_Real_Double_REG, mAX_Real_Double_REG,
mAX_Real_Long_REG,
oTHER_TAG, oTHER_TAG,
...@@ -175,10 +176,12 @@ sEQ_FRAME_SIZE = (SEQ_FRAME_SIZE::Int) ...@@ -175,10 +176,12 @@ sEQ_FRAME_SIZE = (SEQ_FRAME_SIZE::Int)
mAX_Vanilla_REG = (MAX_VANILLA_REG :: Int) mAX_Vanilla_REG = (MAX_VANILLA_REG :: Int)
mAX_Float_REG = (MAX_FLOAT_REG :: Int) mAX_Float_REG = (MAX_FLOAT_REG :: Int)
mAX_Double_REG = (MAX_DOUBLE_REG :: Int) mAX_Double_REG = (MAX_DOUBLE_REG :: Int)
mAX_Long_REG = (MAX_LONG_REG :: Int)
mAX_Real_Vanilla_REG = (MAX_REAL_VANILLA_REG :: Int) mAX_Real_Vanilla_REG = (MAX_REAL_VANILLA_REG :: Int)
mAX_Real_Float_REG = (MAX_REAL_FLOAT_REG :: Int) mAX_Real_Float_REG = (MAX_REAL_FLOAT_REG :: Int)
mAX_Real_Double_REG = (MAX_REAL_DOUBLE_REG :: Int) mAX_Real_Double_REG = (MAX_REAL_DOUBLE_REG :: Int)
mAX_Real_Long_REG = (MAX_REAL_LONG_REG :: Int)
\end{code} \end{code}
Closure header sizes. Closure header sizes.
...@@ -204,7 +207,6 @@ Size of a double in StgWords. ...@@ -204,7 +207,6 @@ Size of a double in StgWords.
\begin{code} \begin{code}
dOUBLE_SIZE = (DOUBLE_SIZE :: Int) dOUBLE_SIZE = (DOUBLE_SIZE :: Int)
mAX_Long_REG = (MAX_LONG_REG :: Int)
wORD64_SIZE = (WORD64_SIZE :: Int) wORD64_SIZE = (WORD64_SIZE :: Int)
iNT64_SIZE = (INT64_SIZE :: Int) iNT64_SIZE = (INT64_SIZE :: Int)
\end{code} \end{code}
......
/* ----------------------------------------------------------------------------- /* -----------------------------------------------------------------------------
* $Id: MachRegs.h,v 1.2 1998/12/02 13:21:13 simonm Exp $ * $Id: MachRegs.h,v 1.3 1999/01/18 14:31:50 sof Exp $
* *
* Registers used in STG code. Might or might not correspond to * Registers used in STG code. Might or might not correspond to
* actual machine registers. * actual machine registers.
...@@ -214,6 +214,7 @@ ...@@ -214,6 +214,7 @@
#define MAX_REAL_VANILLA_REG 1 /* always, since it defines the entry conv */ #define MAX_REAL_VANILLA_REG 1 /* always, since it defines the entry conv */
#define MAX_REAL_FLOAT_REG 0 #define MAX_REAL_FLOAT_REG 0
#define MAX_REAL_DOUBLE_REG 0 #define MAX_REAL_DOUBLE_REG 0
#define MAX_REAL_LONG_REG 0
#endif /* iX86 */ #endif /* iX86 */
......
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