... | ... | @@ -15,3 +15,50 @@ The list of steps needed for new GHC/LLVM port is: |
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**(5)** Now you have LLVM working in unregistered mode, so the next thing is to implement the GHC calling convention in LLVM that is used by GHC's LLVM backend. This should then allow you to get the LLVM backend working in registered mode but with (TABLES_NEXT_TO_CODE = NO in your build.mk). Majority of this step involves hacking inside the LLVM code. Usually lib/Target/\<your target platform name\> is the best way to start. Also you might study what David Terei did for [ x86 support](http://lists.cs.uiuc.edu/pipermail/llvmdev/2010-March/030031.html) and his [ patch itself](http://lists.cs.uiuc.edu/pipermail/llvmdev/attachments/20100307/714e5c37/attachment-0001.obj) to get an idea what's really needed.
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**(6)** Once **(5)** is working you have it all running except TABLES_NEXT_TO_CODE. So change that to Yes in your build.mk and get that working. This will probably involve changing the mangler used by LLVM to work on the platform you are targeting.
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Here is an expanded version of what needs to be done in step 5 and 6 to get a registerised port of LLVM working:
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1. GHC in registerised mode stores some of its virtual registers in
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real hardware registers for performance. You will need to decide on a
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mapping of GHC's virtual registers to hardware registers. So how
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many registers you want to map and which virtual registers to store
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and where. GHC's design for this on X86 is basically to use as many
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hardware registers as it can and to store the more frequently accessed
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virtual registers like the stack pointer in callee saved registers
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rather than caller saved registers. You can find the mappings that GHC
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currently uses for supported architectures in
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'includes/stg/MachRegs.h'.
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1. You will need to implement a custom calling convention for LLVM for your platform
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that supports passing arguments using the register map you
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decided on. You can see the calling convention I have created for X86
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in the llvm source file 'lib/Target/X86/X86CallingConvention.td'.
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1. Get GHC's build system running on your platform in registerised mode.
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1. Add new inline assembly code for your platform to ghc's RTS. See files like
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'rts/StgCRun.c' that include assembly code for the architectures GHC
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supports. This is the main place as its where the boundary between the
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RTS and haskell code is but I'm sure there are defiantly other places
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that will need to be changed. Just grep the source code to find
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existing assembly and add code for your platform appropriately.
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1. Will need to change a few things in LLVM code gen.
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>
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> 5.1 'compiler/llvmGen/LlvmCodeGen/Ppr.hs' defines a platform specific
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> string that is included in all generated llvm code. Add one for your platform.
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> This string specifies the datalayout parameters for the platform (e.g
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> pointer size, word size..). If you don't include one llvm should still
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> work but wont optimise as aggressively.
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> 5.2 'compiler/llvmGen/LlvmCodeGen/CodeGen.hs' has some platform
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> specific code on how write barriers should be handled.
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1. Probably some stuff elsewhere in ghc that needs to be changed (most
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likely in the main/ subfolder which is where most the compiler driver
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lives or in codegen/ which is the Cmm code generator).
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1. This is just what I know needs to be done, I'm sure there is many
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small pieces missing although they should all fall into one of the
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above categories. In the end just trial and error your way to success. |